It's critical to recognize that the chip development phase and the chip production phase are very different. If an attorney tries to craft provisions that apply to both, it usually doesn't work well. These are truly two distinct agreements and when combined, it's common to see two different sets of many of the same provisions, with each set tailored to nuances of that phase. Tips #2-7 address chip development agreements and the remaining tips focus on chip supply agreements.

Most development agreements are broken down into obscure-sounding milestones, such as spec finalization, preliminary design reviews, tape-out, test chips, re-spins, and acceptance. Normally, specified milestone payments are associated with each milestone.

For custom chip development, it is common to see cancellation clauses under which a cancellation fee applies. This is sometimes expressed as a milestone payment for the work being done, plus either a fixed amount or the next succeeding milestone payment. In addition, even when prices are firm, it can be helpful to have a time and materials clause in the agreement that covers instances in which additional design work is requested by the customer or is required for re-spins. (See Tip #5 for more about re-spins.)

When it comes to circuit design and layout, changes are the rule, not the exception. Make sure that every development agreement includes a solid change order mechanism, often called an Engineering Change Order or ECO.

Circuits are often modified and reused (especially for RF chips), which makes IP ownership a tricky issue. A development agreement needs to take pre-existing IP (often called "background IP") into account. A company may find it has limited or no rights to reuse the background IP. This becomes important if companies desire to create a new version of the chip down the road.

It's also common that certain silicon IP "cores" are licensed from third parties, which involves the payment of additional fees and royalties.

In most cases, the chip development company will give the customer "ownership" of the layout in its totality but exclude individual circuits and will want to own any modifications made to circuits.

As part of the highly complicated process, after a design has been thoroughly simulated and verified, it goes through the "tape out" step. This is when the design is sent to a foundry to create a photomask set (called a "mask set") that will be used to fabricate the chip.

Due to the unique nature of masks, specific "mask work rights" were developed to protect them. Because these are tangible and functional, copyright law doesn't apply, and because they're not inventions, patent law doesn't apply. Hence, mask work rights were created as a specific form of IP. A mask work right even has its own symbol, which is a capital M in a circle.

Companies that are paying to have a custom chip developed usually want to "own" the masks that they're paying for, but this gets tricky. With custom chips, the real question is who owns the mask work rights. This is often a subject of involved negotiation. In the event that the end-customer owns the mask work rights, the development agreement must also cover whether this includes rights to modify the masks.

Unlike copyrights, mask work right ownership doesn't automatically include the right to modify. Even if a company ends up "owning" the masks themselves, the masks are foundry-specific, and a foundry will never allow these to leave the foundry.

Another critical development phase involves testing chips to see to what extent the actual chip meets the specs. The holy grail of custom chip development is what is called a "first pass success," but more often, there are areas in which the test chip doesn't meet specs, and a "re-spin" is needed. A re-spin doesn't mean that the design team made a mistake — chip development is inherently an iterative process and designers are usually pushing the design envelope.

It's not really possible to assign a firm schedule or cost numbers to a re-spin, but they always mean more cost and more time. So, every good development agreement should address how re-spins will be handled and who bears that cost, especially if expedited lots (aka "rocket lots") are desired.

In many cases, the chip will be fully tested and validated using an evaluation board, or "eval board," designed for that purpose. A customer will usually also want multiple eval boards for internal use so that its team can run their own tests. This means that the development agreement must specify the eval board and the quantities to be built. In virtually every case, test chips and eval boards do not carry any warranties; rather they are "as is." It's prudent to always build extra eval boards since it usually costs a lot more to build them one-off after the others have been built.

A solid agreement needs to address the design, development, and ownership of custom "packaging" for the chip (the package is what encapsulates the semiconductor die itself). Any changes to a chip's design or spec may impact the packaging and thus must be taken into account when considering an ECO. What may seem like a minor spec change can push package selection from a standard package to a custom one, which will impact part pricing and increase cost.

When chips are being manufactured, they are usually tested first at the "bare die" level and then as packaged chips. Faulty chips are discarded or repaired, where possible and cost-effective. The percentage of chips that pass the final test generates a number known as "assembly yield."

Assembly yield is monitored closely during production and may indicate quality assurance (QA) issues if it deviates significantly for a given lot. A good supply agreement will provide for the tracking of assembly yield and allow a customer to investigate the root cause when there are swings in yield.

The chip production process is a carefully choreographed performance in which the chip company serves as the conductor. The chip company must manage orders and lead times from various suppliers and contractors, including the foundry, package supplier, assembly house, and test house, as well as manage QA at all levels of the production process. Regardless of the type of chip, lead times for chips are measured in months, not days.

Chips are generally ordered far in advance, which many companies are not used to doing. Companies also face issues around minimum low-volume order quantities. Larger than expected orders can also create issues in the supply chain and impact lead time.

The supply agreement should address both lead times and minimum order quantities, neither of which are typically issues when ordering standard parts. "Die banks" are often used to help manage supply and demand swings, but the management and cost of these must also be addressed.

An area that sometimes gets overlooked in supply agreements has to do with the term. Often, customers like to lock in a long-term agreement, so supply is assured. But chips are tied to a highly specific "process geometry," which are end-of-lifed (EOL'd) periodically as new process geometries are introduced. If the part is on a new process, there's likely to be many years before the process is EOL'd. But if it involves an older geometry, an EOL could come up relatively quickly.

Once a process has been EOL'd, the part will need to be "migrated" to a new geometry for production to continue. How this is managed and who bears this cost should be addressed in the supply agreement. Often, parts are redesigned periodically to suit changing requirements and are migrated as part of such redesign. The same issue arises if standard packaging is used and that package is EOL'd.

To put it mildly, custom chip development and supply agreements are complicated. To be crafted properly, in-house counsel must be familiar with how chip development and production works in real life.

There is a steep learning curve to understanding the technology, nuances, and supply chain interdependencies that are involved in both developing and supplying custom chips. And unless companies have a few dozen billion dollars lying around to build their own fab, it's crucial in-house counsel be able to comprehend the intricacies behind custom chips to effectively draft chip development and supply agreements that protect the best interests of all parties involved.

Some chip companies carry broad lines of chips and are vertically integrated (such as TSMC, Samsung, TI, and others), while others, especially fabless chip companies, may specialize in only certain types of chips — for example, analog/mixed-signal/RF, ASICs, processors, memory, FPGAs, networking, wireless, power, or communications — and they outsource fabrication, assembly, and sometimes test.

It is not uncommon for a fabless chip company to work with a foundry, a package supplier, an assembly house, and a test house on a single chip development and supply project. This has important consequences for how a chip development and supply agreement is drafted.

1 Colias, Mike, "Ford, GM Step Into Chip Business," Wall Street Journal (Nov. 18, 2021) at https://on.wsj.com/3PChy5a.